📌 Introduction

Wire

module top_module (
    input in,
    output out);
	assign out = in;
endmodule

GND

module top_module (
    output out);
	assign out = 1'b0;
endmodule

XOR

module top_module (
    input in1,
    input in2,
    output out);
    assign out = !(in1 | in2);
endmodule

And-not Gate

module top_module (
    input in1,
    input in2,
    output out);
	assign out = in1 & !in2;
endmodule

Two Gates

module top_module (
    input in1,
    input in2,
    input in3,
    output out);
    assign out = !(in1 ^ in2) ^ in3;
endmodule

More Gates

module top_module( 
    input a, b,
    output out_and,
    output out_or,
    output out_xor,
    output out_nand,
    output out_nor,
    output out_xnor,
    output out_anotb
);
	assign out_and = a & b;
    assign out_or  = a | b;
    assign out_xor = a ^ b;
    assign out_nand = !(a & b);
    assign out_nor  = !(a | b);
    assign out_xnor = !(a ^ b);
    assign out_anotb = a & !b;
endmodule

📚 Reference