Fsm2s (HDLBits)

📌 Question

This is a Moore state machine with two states, two inputs, and one output. Implement this state machine.

This exercise is the same as fsm2, but using synchronous reset.

🧑‍💻 Code Example

module top_module(
    input clk,
    input reset,    // Synchronous reset to OFF
    input j,
    input k,
    output out); //  

    parameter OFF=1'b0, ON=1'b1; 
    reg state, next_state;

    always @(*) begin
        // State transition logic
        case (state) 
            OFF: next_state = (j==1'b0) ? OFF : ON;
            ON:  next_state = (k==1'b0) ? ON  : OFF;
        endcase
    end

    always @(posedge clk) begin
        // State flip-flops with synchronous reset
        if (reset) begin
           state <= OFF;
        end else begin
           state <= next_state; 
        end
    end

    // Output logic
    assign out = (state == ON);

endmodule

🔬 Simulation Result

📚 Reference

• HDLBits Problem - Fsm2